[mythtv-users] pcHDTV HD3000 stops receiving

[Kevin Bailey]

On Mon, Oct 29, 2007 at 08:04:59AM -0400, H P Ladds wrote:
> 
> Hmmm, this is just about how mine reads when it is NOT working.
> 
> My dmesg -- after successfully capturing video:
> 
> tuner 2-0043: chip found @ 0x86 (cx88[0])
> tda9887 2-0043: tda988[5/6/7] found @ 0x43 (tuner)
> tuner 2-0043: type set to tda9887
> tuner 2-0061: chip found @ 0xc2 (cx88[0])
> tuner-simple 2-0061: type set to 60 (Thomson DTT 761X (ATSC/NTSC))
> tuner 2-0061: type set to Thomson DTT 761X (ATSC/NTSC)
> 
> Interesting that "tuner 2-0043: type set to tda9887" is included with
> mine. Does this imply that 988 (5, 6 or 7) is set after boot? Hmmm,
> and there are three type of firmware? hmmm.
> 
> I don't want to jump to conclusions but since my dmesg was from after
> successfully captured video, and it reads  "tuner 2-0043: type set to
> tda9887" this seems to imply that 988 (5,6,7) might relate to the
> firmware, and that it is installed after boot.

Here's some more from later in the boot (missed by grep):

[   59.508000] or51132: Waiting for firmware
upload(dvb-fe-or51132-vsb.fw)...
[   62.396000] or51132: Version: 10001134-19430000 (113-4-194-3)
[   62.420000] or51132: Firmware upload complete.

Later, I get these every five minutes:

[45759.444000] or51132: unknown status 0x00
[45759.596000] or51132: unknown status 0x00
[46063.140000] or51132: unknown status 0x00
[46063.292000] or51132: unknown status 0x00

> I have some doubts about our problems being related. My troubles
> consistently show up at boot time. If I had to bet, I'd guess that
> there is an issue with the order in which my PCI cards are detected at
> boot time, and the cards are assigned different device #, and this
> cause the firmware to occasionally load to the wrong device.

Well, they may be different versions of the same problem.
The HD3000 forum mentions some bugs and fixes related to
I2C, which could very well be used for downloading firmware.
(We use it for small EEPROMs here at work.) While I2C is a
very simple protocol, the devices on it can be pretty
picky about timing, and one bit missed kills the chip.

Since this is being driven by the kernel, about the only
good way to mess with timing is with additional devices,
or maybe the file system, but I'm starting to get pretty far
out on my speculation limb here.

I guess I'll just hope that the fixes they talk about make
it into the mainstream build someday.