[mythtv] are DSP (hardware acceleration) off-topics?

[mbox at cloppy.net]

I thought one would be interested...
Anyway, I'm again pushing some notes here, if it disturbs I will knock at v4l 
or XBox MLs:-)

I was thinking about compability: not all have the same RAM slots on their mobo 
but all have AGP (faster throughput than PCI).
Performance: FPGA have not much embeded RAM, host computer would be prety busy 
with such an architecture
Costs: RAM bus seems pretty sensitive and at very high speeds


Do you need video on your backend? I wouldn't, being used to telnet/rlogin 
around.
So any basic PCI video board (one is required for boot) would then free up AGP 
bus for other purposes, like e.g. FPGAs :-)

A design around AGP would have many advantages:
- bus mastering, frees fully host computer
- on board memory, GOPs -Group Of Pictures from a video sequence- can be 
transfered to board, boards later pushes back codec/decoded/transcodes GOPs
- still low power consumption (versus Intel or AMD solution)
- compability (versus RAM slot solution)
- ...


Again, I found something on internet.

Regards


http://ptolemy.eecs.berkeley.edu/projects/acs/reports/98/sanders9804.pdf

1.1 Annapolis PCI and Sun Ultra 30
We have received both the Annapolis Systems FPGA PCI bus card and the Sun Ultra 
30 workstation which will host the FPGA card. From the Annapolis documentation 
it is unclear whether the FPGA PCI bus card supports direct memory access 
(DMA), although PCI bus mastering is indicated. Without PCI card DMA, 
preferably including multi-word transfers, data transfer between the host and 
the PCI card my be a bottle-neck for some applications. Program IO by the host 
Ultra-Sparc CPU should be avoided if possible. Per-formance analysis of the 
Annapolis PCI card will help define the architecture of a pro-posed next 
generation FPGA AGP bus card with improved performance.

1.3 AGP Card Proposal
The next generation of reconfigurable computing platforms will utilize the 
latest 0.25 micron FPGA technology (Xilinx Virtex) utilizing system clock 
frequencies nearing 100MHz. The processing power of these systems will be 
limited by 33 MHz and even 66 MHz PCI bus bandwidth. The Advanced Graphics Port 
(AGP) bus which is currently find-ing it’s way into Pentium II PCs is a good 
match to the next generation reconfigurable computing technologies. The AGP bus 
provides performance enhancing extensions to the PCI bus specification leading 
to bandwidths from 500-1000 MBytes/sec. An AGP card containing 4 x 250K gate 
Xilinx Virtex FPGAs each with local 32 bit wide SDRAM, plus programmable cross-
bar interconnect and AGP interface with dedicated 32 data ports for each of the 
4 FPGAs should provide adequate performance for the graphics/video process-ing 
applications which could provide the killer app for reconfigurable computing.